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Fixed-direction voltage translators
Two channel fixed-direction level shifter with channels in same direction
Data sheet
- document-pdfAcrobat TXU0102 Dual-Bit Fixed Direction Voltage-Level Translator with Schmitt-Trigger Inputs and 3-State Outputs datasheet (Rev. A) PDF | HTML
TXU0102
Product details
- Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
- Up to 200 Mbps support for 3.3 V to 5.0 V
- Schmitt-trigger inputs allows for slow and noisy inputs
- Inputs with integrated static pull-down resistors prevent channels from floating
- High drive strength (up to 12 mA at 5 V)
- Low power consumption
- 2.5 µA maximum (25°C)
- 6 µA maximum (–40°C to 125°C)
- VCC isolation and VCC disconnect (Ioff-float) feature
- If either VCC input is <100 mV or disconnected, all outputs are disabled and become high-impedance
- Ioff supports partial-power-down mode operation
- Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
- Pinout compatible with TXB family level shifters
- Available in another variant that supports common applications: TXU0202
- Operating temperature from –40°C to +125°C
- Latch-up performance exceeds 100 mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 2500-V human-body model
- 1500-V charged-device model
- Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
- Up to 200 Mbps support for 3.3 V to 5.0 V
- Schmitt-trigger inputs allows for slow and noisy inputs
- Inputs with integrated static pull-down resistors prevent channels from floating
- High drive strength (up to 12 mA at 5 V)
- Low power consumption
- 2.5 µA maximum (25°C)
- 6 µA maximum (–40°C to 125°C)
- VCC isolation and VCC disconnect (Ioff-float) feature
- If either VCC input is <100 mV or disconnected, all outputs are disabled and become high-impedance
- Ioff supports partial-power-down mode operation
- Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
- Pinout compatible with TXB family level shifters
- Available in another variant that supports common applications: TXU0202
- Operating temperature from –40°C to +125°C
- Latch-up performance exceeds 100 mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 2500-V human-body model
- 1500-V charged-device model
TXU0102 is a 2-bit, dual-supply noninverting fixed direction voltage level translation device. Ax pins are referenced to VCCA logic level, OE pin can be referenced to either VCCA or VCCB logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept input voltages ranging from 1.1 V to 5.5 V, while the B port can also accept input voltages from 1.1 V to 5.5 V. Fixed direction data transmission can occur from A to B or B to A when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.
TXU0102 is a 2-bit, dual-supply noninverting fixed direction voltage level translation device. Ax pins are referenced to VCCA logic level, OE pin can be referenced to either VCCA or VCCB logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept input voltages ranging from 1.1 V to 5.5 V, while the B port can also accept input voltages from 1.1 V to 5.5 V. Fixed direction data transmission can occur from A to B or B to A when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.
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Technical documentation
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View all 8Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | TXU0102 Dual-Bit Fixed Direction Voltage-Level Translator with Schmitt-Trigger Inputs and 3-State Outputs datasheet (Rev. A) | PDF | HTML | 10 Mar 2022 |
Application note | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 12 Jul 2024 | |
Application note | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 03 Jul 2024 | |
Application brief | Enabling Power-Efficient FPGA Designs With Level Translation | PDF | HTML | 30 Apr 2024 | |
Application brief | Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages | PDF | HTML | 05 Sep 2023 | |
Product overview | Enabling System on Module Industrial PC Connectivity With Level Translation | PDF | HTML | 03 Apr 2023 | |
Application brief | Enabling Next Generation Processors, FPGA, and ASSP with Voltage Level Translat | PDF | HTML | 17 Jan 2023 | |
Application brief | Enabling Next Generation Wireless Beacons with Level Translation | PDF | HTML | 14 Apr 2022 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
Evaluation board
5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages
Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Not available on TI.com
Simulation model
TXU0102, TXU0102-Q1 IBIS Model
SCEM792.ZIP (56 KB) - IBIS Model
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
VSSOP (DCU) | 8 | Ultra Librarian |
X1QFN (DTT) | 8 | Ultra Librarian |
X2SON (DTM) | 8 | Ultra Librarian |
TI's Standard Terms and Conditions for Evaluation Items apply.
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